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CMPWR025 Dual Input SmartORTM Power Switch
Features
* * * * * * * * * Automatically selects VCC1 OR VCC2 input source Integrated low impedance switches (0.2 TYP) Operating supply range from 2.8V to 5.5V Provides up to 500mA output current Glitch-free output during supply switching transitions Low operating supply current of 20A (TYP) User-selectable hysteresis for supply selection 8-pin MSOP package Lead-free version available
Product Description
California Micro Devices' SmartORTM CMPWR025 is a dual input power switch that selects between two different power inputs and delivers it to one output. The device integrates two very low impedance power switches and automatically implements an OR function that selects the higher of the two inputs. A hysteresis is built in (and is user selectable) to prevent switch chatter. The CMPWR025 is a much-improved solution to simply ORing two diodes, due to the greatly reduced losses of the CMPWR025 when compared to low forward drop Schottky diodes. The CMPWR025 is designed to operate above the 1W (375mA at 3.3V) sleep mode rating stated in the PCI Rev 2.2 spec. In fact the CMPWR025 current rating is dependent upon the power dissipation resulting from the voltage drop across the internal switch elements. See the Typical DC Characteristics section in this data sheet for details. For IAPC (Instantly Available Personal Computer) applications see the CAMD Applications Note AP-211 "Instantly Available PCI Card Power Management". The CMPWR025 is housed in a 8-lead MSOP package and is available with optional lead-free finishing.
Applications
* * * * * * PCI cards for Wake-On-LAN/Wake-On-Ring Dual power systems Systems with standby capabilities Battery backup systems See Application Note AP-211 USB enabled mobile electronics such as MP3 Players, PDAs, Digital Cameras and Wireless Handsets
Typical Application Circuit
Simplified Electrical Schematic
SW1 0.2 VCC1
CMPWR025
VCC1 VOUT VCC2
VCC1 5V
VOUT
+ VCC2 5V
+
+ COUT GND
10F
HYS + -
-
VOUT SW2 0.2
VCC2
GND
HYS GND
(c) 2004 California Micro Devices Corp. All rights reserved. 06/21/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
1
CMPWR025
PACKAGE / PINOUT DIAGRAM
Top View
VCC1 VCC1 VCC2 VCC2 1 2 3 4 8 7 6 5 HYS VOUT VOUT GND
8-pin MSOP CMPWR025M/R
Note: This drawing is not to scale.
PIN DESCRIPTIONS
PIN(S) 1,2 NAME VCC1 DESCRIPTION VCC1 is the primary power source, which is given priority when present. If pin 8 (HYS) is unconnected, then the hysteresis level is 75mV (typ.). Whenever the primary power source drops below the secondary supply VCC2 by more than 125mV, it will immediately become deselected. When the primary power source is restored to within 50mV of the secondary supply, the primary power source will once again be selected and provide all the output current. When VCC1 is selected, it will supply all the internal current requirements which are typically 20A. When VCC1 is not selected, there will be no current loading on this input. Pins 1 & 2 must be connected together externally. VCC2 is the secondary power source and is selected when the primary source has fallen below it by more than 125mV (or 200mV if pin 8 is grounded). The secondary source will be deselected immediately once the primary source is restored to within 50mV of VCC2 . When VCC2 is selected, it will supply all the internal current requirements which are typically 20A. When VCC2 is not selected, there will be no current loading on this input. Pins 3 & 4must be connected together externally. Negative reference for all voltages. Positive voltage output switched from VCC1 or VCC2 inputs. During normal operation the impedance , from VOUT to the selected supply is typically less than 0.28 which results in minimal voltage loss from input to output. During the cold-start interval when both inputs are initially applied, the internal circuitry provides a soft turn-on for the switches, which limits peak in-rush current. Pins 6 & 7 must be connected together externally. HYS is the user-selectable hysteresis input. The hysteresis level is set to 150mV when pin 8 is grounded. The default hysteresis level is set to 75mV by leaving pin 8 unconnected. Using 150mV hysteresis is recommended, especially in environments with noisy power supplies, high power supply resistances or high load currents. If the hysteresis level is set to 150mV, the primary supply VCC1 must now fall 200mV below the secondary supply VCC2 before it becomes deselected.
3,4
VCC2
5 6,7
GND VOUT
8
HYS
Ordering Information
PART NUMBERING INFORMATION
Standard Finish Regulator CMPWR025 Pins 8 Package MSOP Ordering Part Number1 CMPWR025M Part Marking P025 Lead-free Finish Ordering Part Number1 CMPWR025R Part Marking R025
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
(c) 2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
06/21/04
CMPWR025
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER ESD Protection (HBM) Pin Voltages VCC1 VCC2 Maximum DC Output Current Storage Temperature Range Operating Temperature Range Ambient Junction Power Dissipation RATING +2000 [GND - 0.5] to [+6.0] [GND - 0.5] to [+6.0] 750 -65 to +150 -20 to +70 -20 to +125 0.3 UNITS V V V mA C C C W
STANDARD OPERATING CONDITIONS
PARAMETER VCC1 and VCC2 Input Voltage Ambient Operating Temperature Range ILOAD RATING 2.8 to 5.5 0 to +70 0 to 500 UNITS V C mA
(c) 2004 California Micro Devices Corp. All rights reserved. 06/21/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
3
CMPWR025
Specifications (cont'd)
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL VCCDES1 VCCDES2 VCC1SEL VHYS1 VHYS2 tDL tDH RSW VSW PARAMETER VCC1 Deselect VCC2 Deselect 2 VCC1 Select Preference Hysteresis VCC1SEL-VCC1DES VCC1SEL-VCC1DES Switching Delay Switch Resistance HYS input (Pin 8) floating; Note 2 HYS input (Pin 8) grounded; Note 2 VCC1,2 falltime < 100ns; Note 3 VCC1,2 risetime < 100ns; Note 3 ILOAD = 0 to 500mA; VCC1,2 = 2.8V ILOAD = 0 to 500mA; VCC1,2 = 5.0V CONDITIONS VCC1 deselect level below VCC2; HYS input (Pin 8) floating VCC1 deselect level below VCC2; HYS input (Pin 8) grounded MIN 50 90 10 40 80 TYP 125 200 50 75 150 200 200 0.28 0.21 28 56 140 21 42 105 0.4 0.3 40 80 200 30 60 150 100 100 MAX 200 300 100 100 200 UNITS mV mV mV mV mV ns ns mV mV mV mV mV mV A A A A 50 A
Voltage Drop Across Switch IOUT = 100mA; VCC1,2 = 2.8V (VCC1,2 - VOUT) IOUT = 200mA; VCC1,2 = 2.8V IOUT = 500mA; VCC1,2 = 2.8V IOUT = 100mA; VCC1,2 = 5.0V IOUT = 200mA; VCC1,2 = 5.0V IOUT = 500mA; VCC1,2 = 5.0V
IRCC1 IRCC2 ICC1, ICC2 IGND
Reverse Leakage Supply Current Ground Pin Current
VCC1=0V; VCC2 = 5.0V VCC1=5.0V; VCC2 = 0V When selected (IOUT = 0) When NOT selected VCC1 = VCC2 = 5.0V; ILOAD = 0mA to 500mA
xx
20 1 20
Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified. Note 2: Hysteresis level defines the maximum level of acceptable noise on VCC during switching. Excessive parasitic inductance on VCC board traces to the CMPWR025 may require an input capacitor to adequately filter the supply noise to below the hysteresis level. This will ensure that precise switching occurs between VCC1 and VCC2 supply inputs. Note 3: This is the time, after the select/deselect threshold is reached, for the switches to react. Not tested, guaranteed by device design and characterization.
(c) 2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
06/21/04
CMPWR025
Selection Threshold Diagrams
Figure 1. Supply Threshold Diagram (Hysteresis input pin floating, see Typical Application Circuit, pg. 1)
Figure 2. Supply Threshold Diagram (Hysteresis input tied to GROUND, see Typical Application Circuit, pg. 1)
(c) 2004 California Micro Devices Corp. All rights reserved. 06/21/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
5
CMPWR025
CMPWR025 Typical DC Characteristics
The Switch Resistance vs. Temperature curve shown in Figure 3 illustrates the switch resistance measured at 500mA load with VCC equal to 3.3V and 5V. The resistance is shown at a temperatures range of -40C to 70C. When the temperature rises from 25 to 70C, the switch resistance increases by about 20%.
Switch resistance vs. Temperature
0.40
The Hysteresis Voltage vs. Temperature curve shown in Figure 5 illustrates how the hysteresis voltages vary with temperature. `VHYS1' is the hysteresis value if pin 8 is left unconnected, `VHYS2' is the hysteresis value if pin 8 is connected to ground. `VCC1sel' is the voltage below VCC2 at which Vcc1 will be selected (refer to selection threshold diagrams on page 5). These three voltages are independent of the VCC operating voltage.
Switch Resistance (ohm)
0.35
200
Vcc = 3.3V
Hysteresis Voltage (mV)
0.30 0.25 0.20 0.15 0.10 -40 -30 -20 -10 0
175 150 125 100 75 50 25 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70
VHYS2
Vcc = 5.0V
VHYS1 VCC1sel
10 20
30
40
50
60
70
Figure 3. Switch Resistance vs. VCC with Temperature The Supply Current vs. Temperature curve shown in Figure 4 illustrates the internal supply current with VCC equal to 3.3V and 5V. This current is drawn from the selected VCC input, and is dissipated through the ground pin (pin 5). This current is independent of load current.
40 35 30
Temperature (degree C)
Figure 5. Hysteresis Voltage vs. Temperature Power Dissipation and Output Current Considerations The CMPWR025 is supplied in a MSOP package which has a maximum power dissipation rating of 0.3W. It is important that the heat generated within the part does not exceed this rating. The heat generated by the load current is given by: PDISS = VSW X ILOAD or PDISS = RSW X (ILOAD)2
Icc (uA)
25 20 15 10
Vcc = 5.0V
Vcc = 3.3V
5 0 -40 -30 -20 -10 0 10 20 30 40 50 60 70
At a typical load of 375mA the PDISS is just 0.4 x (0.375)2 = 56mW.
Temperature (degree C)
Figure 4. Supply Current vs. Temperature
(c) 2004 California Micro Devices Corp. All rights reserved.
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430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
06/21/04
CMPWR025
Typical DC Characteristics (cont'd)
A primary consideration is Maximum Junction Temperature, TJ(max), which can be calculated using the following formula: TJ(max) = TA + JA X PDISS Where: TA = The Ambient Temperature PDISS = Power Dissipation In the above example operating at an ambient of 70C, TJ(max) would be: TJ(max) = 70C + (0.056W)(100C/W) = 75.6C Maximum power dissipation, including the power from the other circuitry within the device, suggests a current rating of approximately:
PDISS - PINT RSW
JA = Thermal Resistance = 100 C/W
supply source impedances RS1 and RS2, which represent the power supplies' output impedances and interconnection parasitics to the VCC1 and VCC2 input pins. In this test set-up, the series resistances on VCC1 and , , VCC2 are respectively RS1 = 0.16 and RS2 = 0.06 unless specified otherwise. A load resistance RL of 11 is used, setting a load current of about 450mA at 5V. The hysteresis level is increased by connecting pin 8 to ground, which will improve the transient performance in noisy environments. In the transient analysis, the rise time and fall time of VCC1 is very long, in the 20msec range, providing a worst case situation. Important note: The power supply source impedance must be as low as possible to avoid chatter during power transition. When operating in a high load and long rise time power-up condition, we recommend not exceeding a value of 0.15 on both source resistances. VHYS > I (RS + RT)
= ILOAD
0.3W - 100W 0.4
= 865mA
Where:
VHYS = The Minimum Hysteresis Voltage = 80mV RS = The Power Supply Output Impedance RT = The PCB Trace Impedance
Note that this is beyond the maximum current rating of the device, which is 750mA maximum. Typical Transient Characteristics The circuit schematic in Figure 6 below shows the transient characterization test setup. It includes the power
RS1 VCC1 5V TR = 20ms TF= 20ms
For a rated load of 500mA, RS + RT < 0.15.
C1 0.1F
+
C2 10F
GND CMPWR025 RS2 VCC1 VCC2
+ -
VOUT C5 0.1F + C6 10F
VOUT
VCC2
5V
C3 0.1F
+ C4 10F
HYS GND
Load 11
GND
Figure 6. Transient Characterization Test Set-up
(c) 2004 California Micro Devices Corp. All rights reserved. 06/21/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
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CMPWR025
Typical DC Characteristics (cont'd)
Input and Output Capacitors Filtering is typically unnecessary on the inputs, however power supply source impedance and parasitic resistance or inductance on the interconnections may result in chattering during the supply changeover. When an input is deselected and the input current drops to zero, the voltage at the input terminals will rise. If this voltage rise exceeds the hysteresis (75mV typical), the switch may chatter. There are four ways to eliminate this chatter: a) Connect pin 8 to GND to select 150mV hysteresis, b) position the device as close as possible to the power supply connectors, c) use low-impedance PCB traces, or d) include low-ESR input bypass capacitors at the VCC1 and VCC2 input pins. Capacitors of 10F or greater are recommended. VOUT provides the power for the load. To ensure the output is glitch-free during dynamic switching of the inputs, it is recommended that an external capacitor of 10F or greater is included. This will restrict any transient output disturbances to less than 300mV at 500mA loading during dynamic switching of the inputs. The test set-up used in Figure 7 and Figure 8 is described on page 7. The set-up for Figure 9 has larger series resistances on VCC1 and VCC2. VCC1 Rising from 0V to 5V/(VCC2 = 5V). Figure 7 shows the primary supply VCC1 becoming selected during a 0V to 5V transition. The secondary supply VCC2 is set to 5V DC. The channel 1 switch is turned on when VCC1 rises to within about 70mV of VCC2. VCC1 drops when it is selected due to power supply source resistance RS1. A positive glitch appears on VCC2 when channel 2 switch is turned off, due to power supply inductance. This has no effect on the output voltage.
Ch1 100mV Ch3 100mV Tek 1.00MS/s 4 Acqs : 72mV @: 4.900V
VCC2
3 VCC1 VOUT
100mV M 50s Ch1
4.88V
Figure 7. VCC1 rising from 0V to 5V, VCC2 = 5V. Ch1 and Ch2: VCC1 and VCC2, offset = 5V. Ch3: VOUT , offset = 5V. VCC1 Falling from 5V to 0V (VCC2 = 5V). Figure 8 shows the primary supply VCC1 becoming deselected during a 5V to 0V transition. The test conditions are the same as in Figure 7. Channel 2 switch is turned on as soon as VCC2 and VCC1 are about 200mV. A negative glitch appears on VCC2, when channel 2 is turned on. This has no effect on the output voltage.
Tek 1.00MS/s 1 Acqs : 200mV @: 4.802V VCC2 VCC1
3
VOUT
100mV Ch3 100mV
Ch2 100mV M 50s Ch1
4.88V
Figure 8. VCC1 falling from 0V to 5V (VCC2 = 5V). Ch1 and Ch2: VCC1 and VCC2, offset = 5V. Ch3: VOUT , offset = 5V.
(c) 2004 California Micro Devices Corp. All rights reserved.
8
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
06/21/04
CMPWR025
Typical DC Characteristics (cont'd)
VCC1 Rising (VCC2 = 5V). Figure 9 is a bad test set-up that shows what may happen if either power supply source resistance RS1 or RS2 is too large. In this example, RS2 is increased to 0.3 .
Tek 50.0kS/s 0 Acqs : 72mV @: 4.790V VCC2 VCC1
3
VOUT
100mV Ch3 500mV
Ch2 100mV M 1.00ms Ch3
4.62V
Figure 9. VCC1 Rising (VCC2@ = 5V). Ch1 and Ch2: VCC1 and VCC2@, offset = 5V. Ch3: VOUT, offset = 3.3V. The oscillation during the power transition is caused by the cumulated voltage change across RS1 and RS2 being greater than the hysteresis. The behavior is exacerbated by: * * * a high load current, too many parasitics on power lines, and noisy power sources.
To avoid such behavior, the solution is to reduce the load or parasitic on power supply and layout, or use a more stable power supply. See Application Note AP-211 for more information.
(c) 2004 California Micro Devices Corp. All rights reserved. 06/21/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
9
CMPWR025
Mechanical Details
MSOP-8 Mechanical Specifications: The CMPWR025 is packaged in 8-pin MSOP package. Dimensions are presented below. For complete information on the MSOP-8 package, see the California Micro Devices MSOP Package Information document.
8
Mechanical Package Diagrams
TOP VIEW
D
7 6 5
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 B C D E e H L # per tube # per tape and reel 2.90 2.90 4.78 0.52 Millimeters Min 0.87 0.05 0.18 3.10 3.10 4.98 0.54 0.114 0.114 0.188 0.017 Max 1.17 0.25 Min 0.034 0.002 MSOP 8 Inches Max 0.046 0.010
SIDE VIEW 1 2 3 4
H
Pin 1 Marking
E
0.30 (typ)
0.012 (typ) 0.007 0.122 0.122 0.196 0.025
SEATING PLANE
A A1 B e
END VIEW
0.65 BSC
0.025 BSC
80 pieces* 4000 pieces Controlling dimension: inches
C
L
* This is an approximate amount which may vary.
Package Dimensions for MSOP-8
(c) 2004 California Micro Devices Corp. All rights reserved.
10 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
06/21/04

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